![]() ![]() I would like to implement this in hardware (e.g., 74-series ICs). Below is VHDL I used for shifting/rotating. Filename: shiftregisters0.v // 8-bit Shift Register // Rising edge clock. I have my processor prototype running on an FPGA. This coding example uses a concatenation to describe the Register chain. Is there a better way to approach this? Thanks! Maybe I need to use D flip flops to build it out? 74HC195 is an example of an 8-bit PIPO shift register, but I don't see how I would cascade four of these together and catch the rotate (left or right) bit that falls off. I would like to support parallel in with parallel out (PIPO), 16-bit, in a single clock pulse, with the support for rotating the bit falling off.Ĭan anyone point me to a reference design for something like this, or suggest ICs that would make sense to use? I am currently looking at 74F299 (universal shift register), but I'm not sure if that will get it done. When you want to rotate left an 8 bit signal 1 position (8b00001111 << 1) the result is 8b00011110) also when you want to rotate left 9 positions (8b00001111 << 9) the result is the same 8b00011110, and also rotating 17 positions, this reduce your possibilities to next table: so. One of the modules I need to design yet is a shift/rotate for the 16-bit A register. The best way I found to do this is finding a pattern. I am looking to implement a shift/rotate circuit for a 16-bit processor that I am building. ![]()
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